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Projecte llegit

Títol: Automatic Detection and Localization of Logic Gates using Image Recognition

Estudiants que han llegit aquest projecte:

Director/a: TARRÉS RUIZ, FRANCESC

Departament: TSC

Títol: Automatic Detection and Localization of Logic Gates using Image Recognition

Data inici oferta: 26-02-2013     Data finalització oferta: 26-10-2013


Estudis d'assignació del projecte:
    Tipus: Individual
     
    Lloc de realització: EETAC
     
    Paraules clau:
    Logic Gate, Integrated Circuit, Reverse Engineering, Image Processing, Matlab
     
    Descripció del contingut i pla d'activitats:
    In order to extract the images of a microchip is necessary attack the microchip with
    mechanical or chemical lapping and taking pictures from the inside. The result is the
    extraction of four layers with their respective images, including the cell layer where the
    logic gates are defined. This image of the cell layer is very large and could store tens of
    thousands of logic gates inside. The main objective of this project is to design and
    implement a software to recognize logic gates and specify its precise location in the cell
    layer of a microchip.
     
    Overview (resum en anglès):
    In order to extract the images of a microchip is necessary attack the microchip with
    mechanical or chemical lapping and taking pictures from the inside. The result is the
    extraction of four layers with their respective images, including the cell layer where the
    logic gates are defined. This image of the cell layer is very large and could store tens of
    thousands of logic gates inside. The main objective of this project is to design and
    implement a software to recognize logic gates and specify its precise location in the cell
    layer of a microchip.

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