Projecte llegit
Títol: Assembly, Validation, and Firmware Implementation of the 3Cat-8 UHF-LoRa Communications Board
Estudiants que han llegit aquest projecte:
BUJ RUIZ, ALEIX (data lectura: 15-09-2026)- Cerca aquest projecte a Bibliotècnica
BUJ RUIZ, ALEIX (data lectura: 15-09-2026)Director/a: PARK, HYUK
Departament: FIS
Títol: Assembly, Validation, and Firmware Implementation of the 3Cat-8 UHF-LoRa Communications Board
Data inici oferta: 25-02-2026 Data finalització oferta: 25-10-2026
Estudis d'assignació del projecte:
- GR ENG SIS TELECOMUN
| Tipus: Individual | |
| Lloc de realització: EETAC | |
| Segon director/a extern: Luis Contreras | |
| Paraules clau: | |
| UHF, LoRa | |
| Descripció del contingut i pla d'activitats: | |
| -Description
The 3Cat-8 mission is a 6U CubeSat being developed at the UPC NanoSat Lab to emphasize on space research, more specifically this mission operates for ionospheric research. In this project, work will be conducted on one of the satellite's key subsystems: the communications (COMMS) board. Although the 3Cat-8 spacecraft includes multiple communication systems such as X-band and S-band, the project focuses specifically on the UHF/LoRa COMMS board, which targets the telemetry band. This is essential to guarantee robust and reliable communication capabilities although its low bitrate, perfect for critical satellite operations. -Methodology and Objectives The first point will be assembly. Starting from a PCB and the necessary components gathered for implementation of the final hardware board. Objectives include welding the different components onto the board; after this step, a crucial part is validation, testing every single component and making sure it fits with the PCB, as well as RF characterization to ensure it achieves the specifications. This verification will be done in the lab to probe and make sure it behaves as expected. Last part, flashing the microcontroller and making it work by implementing the necessary code, besides overwriting the firmware to add new features and error correction for better operation. -Workplan Phase 1: Assemble the components onto the PCB to obtain the functional UHF+LoRa communications board. Phase 2: Validate the board and characterize the components to ensure everything works as expected. Phase 3: Implement the firmware to enable the microcontroller, ensure proper communication with the OBC, and add new features along with error corrections to the code. -Expected results Achieve the proper assembly and operation of the board, ensuring every single component works correctly, along with optimized firmware integration to enhance its performance and task effectiveness. Additionally, enable transmission and reception capabilities across both bands to achieve enhanced performance. |
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| Overview (resum en anglès): | |
| The continuous evolution of the NewSpace sector enables academic institutions to undertake complex nanosatellite missions. In this context, the UPC NanoSat Lab is developing the 3Cat-8 mission. A fundamental requirement for this satellite is a reliable communications subsystem that ensures the telemetry and telecommand link with the ground station. This work focuses on the assembly, validation, and firmware implementation of the UHF-LoRa communications board for this nanosatellite.
The project encompasses both hardware and software aspects. On the hardware side, it includes the assembly of the printed circuit board, adapting soldering methodologies to manufacturing constraints, along with rigorous validation to ensure the physical integrity of the subsystem. This process involves careful selection of components, implementation of quality control procedures during soldering, and systematic electrical testing to verify proper connections and functionality of all circuit elements. On the software side, it involves the implementation of a real-time embedded software architecture for the UHF module. Regarding the LoRa module, given that the mission's final firmware is still under development, a dedicated test firmware will be designed to independently evaluate and fully validate the subsystem's operability. Finally, the implementations are verified by performing tests, where the most relevant aspects are highlighted. This testing allows validation of the system in both the software and hardware domains. The work emphasizes the importance of producing a verified communications module that contributes to identifying errors and ensuring the proper functioning of the system. |
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